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19-1655; Rev 1; 2/01
UAL IT MAN TION K E VALUA E BL AVAILA
CDMA Cellular/PCS System Power Supplies
Features
o One 300mA Low-Noise LDO o Four 150mA Low-Noise LDOs o 45VRMS Noise from 10Hz to 100kHz o >60dB Crosstalk Isolation Below 10kHz o >60dB PSRR Below 10kHz o 125mV (max) Dropout (OUT1 at 200mA) o 100mV (max) Dropout (OUT2-5 at 100mA) o Programmable Output Voltages 1.8V to 3.3V in 32 Steps o 140ms (min) Reset Timer o SPI- or I2C-Compatible Serial Interface o Push-On/Push-Off Control Logic o Two 150mA General Purpose Open-Drain Outputs o Overcurrent and Thermal Protection (all LDOs) o 1A Shutdown Current o 20-Pin Thermally-Enhanced TSSOP or QFN Packages
General Description
The MAX1798/MAX1798A/MAX1799/MAX1799A system power supplies are designed specifically for CDMA cellular/PCS handsets. Each device contains five lowdropout linear regulators (LDOs), a 140ms (min) reset timer, a serial interface, push-on/push-off control logic, and two general-purpose open-drain outputs. Only the serial interface is different between the MAX1798/ MAX1798A/MAX1799/MAX1799A: the MAX1798/ MAX1798A feature an SPITM-compatible serial interface, and the MAX1799/MAX1799A feature an I2CTM-compatible interface. The "A" parts have a -13% reset threshold, the non-A parts have a 9.5% threshold. The "A" parts have a 175 delay on a reset-triggered shutdown, the non-A shutdown instantly. Each linear regulator features extremely low dropout voltage, specified at two-thirds of the maximum output current. LDO1 is rated for 300mA, while LDOs 2-5 are each rated for 150mA. All LDOs are optimized for low noise and isolation. Each LDO can be individually enabled and disabled through the serial port, as well as individually programmed to any of 32 voltages from 1.8V to 3.3V. The MAX1798/MAX1798A/MAX1799/MAX1799As' wide 2.5V to 5.5V input voltage range makes them compatible with a wide range of input supplies, including a single lithium-ion (Li+) cell battery. Both devices are available in thermally-enhanced 20-pin TSSOP and QFN exposed pad (EP) packages. Evaluation kits in TSSOP (MAX1798EVKIT and MAX1799EVKIT) are available to facilitate designs.
MAX1798/MAX1798A/MAX1799/MAX1799A
Applications
CDMA Cellular/PCS Handsets PDAs, Palmtops, and Handy-Terminals Single-Cell Li+ Systems 2- or 3-Cell NiMH, NiCd, or Alkaline Systems
Typical Operating Circuit
ONO IN4/5 2.5V TO 5.5V OFF IN2/3 OUT1 IN1 RSO ON RESET TX RX BBA AUDIO OR PLL + VCO VIN1 DR1 DR2 GND PGND VIBRATOR WDOUT VCC IRQ MSM CONTROLLER
Ordering Information
PART MAX1798EGP MAX1798EUP MAX1798AEGP MAX1798AEUP TEMP RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C PINPACKAGE 20 QFN 20 TSSOP-EP 20 QFN 20 TSSOP-EP INTERFACE SPI SPI SPI SPI
MAX1798 MAX1798A* MAX1799 MAX1799A*
OUT2 OUT3 OUT4 OUT5
CS (AS) SPI OR I 2C SCLK (SCK) DIN (SDA) BP 0.01F
Ordering Information continued and Pin Configurations appear at end of data sheet.
BACKLIGHT ( ) ARE FOR MAX1799/MAX1799A. *-13% RESET THRESHOLD AND SHUTDOWN RESET TIMER ADDED.
SPI is a trademark of Motorola, Inc. I2C is a trademark of Philips Corp. 1
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
CDMA Cellular/PCS System Power Supplies MAX1798/MAX1798A/MAX1799/MAX1799A
ABSOLUTE MAXIMUM RATINGS
OFF, DR1, DR2 to GND............................................-0.3V to +6V IN1, IN2/3, IN4/5, DIN (SDA) to GND .......................-0.3V to +6V SCLK (SCK), BP, ON to GND...................................-0.3V to +6V RSO, ONO to GND .................................-0.3V to (VOUT1 + 0.3V) PGND to GND.....................................................................0.3V OUT1, CS (AS) to GND ..............................-0.3V to (VIN1 + 0.3V) OUT2, OUT3 to GND...............................-0.3V to (VIN2/3 + 0.3V) OUT4, OUT5 to GND...............................-0.3V to (VIN4/5 + 0.3V) Continuous Sink Current DR1, DR2...............................................................100mARMS RSO................................................................................25mA Continuous Power Dissipation (TA = +70C) 20-Pin QFN (derate 20mW/C above +70C) .................1.6W 20-Pin TSSOP (derate 26mW/C above +70C) .............2.1W Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN1 = VIN2/3 = VIN4/5 = VSCLK (SCK) = VDIN (SDA) = V CS (AS) = V OFF = 3.6V; ON = GND = PGND = 0; RSO, ONO, DR1, DR2 = open; BP bypassed with 0.01F, OUT1 bypassed with 4.7F; OUT2, OUT3, OUT4, OUT5 bypassed with 2.2F; OUT1-5 set to 2.98V, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER IN1, IN2/3, IN4/5 Operating Voltage Undervoltage Lockout IN1 Undervoltage Lockout IN2/3 Undervoltage Lockout IN4/5 Power-On Reset Threshold Supply Current in Shutdown Supply Current (Standby) Supply Current (All Outputs On) BP Voltage BP Supply Rejection OUT1 REGULATOR Output Accuracy Output Accuracy (Line and Load) Nominal Voltage Adjust Range Dropout Voltage Load Regulation Line Regulation Current Limit Output-Discharge Switch Resistance in Shutdown OUT1 Reset Threshold
Output Voltage Noise
SYMBOL
CONDITIONS
MIN 2.5
TYP
MAX 5.5
UNITS V V V V V A A A V mV % % V mV %/mA
VUVLO-1 VUVLO-2/3 VUVLO-4/5 ISHDN ION
IN1 rising edge IN2/3 rising edge IN4/5 rising edge IN1 falling edge OFF = 0, ON = IN1 OUT1 ON, other regulators OFF IOUT1 = 0 All regulators ON, IOUT_ = 0 IBP 1nA 2.5V VIN1 5.5V IOUT1 = 70mA (Note 3) 1mA IOUT1 300mA, 2.5V VIN1 5.5V, VOUT1 = 1.8V (Note 3) 32 steps through serial interface; Tables 2, 3 IOUT1 = 1mA (Notes 1, 3) IOUT1 = 200mA (Notes 1, 3) 0.1mA IOUT1 300mA 2.5V VIN1 5.5V, VOUT1 = 1.8V (Note 3)
2.10 2.10 2.10 0.9
2.30 2.30 2.30 1 113 367
2.45 2.45 2.45 2.1 10 230 680 1.269 5 2 3 3.3
1.231
1.250 0.2
-2 -3 1.8 1 73 -0.003 -0.15 320 -0.03 500 25 -9.5 -15 -7.5 -13
125 0.11 850 300 -5.5 -11
%/V mA %
Regulator output turned off OUT1 rising and falling (MAX1798/MAX1799)
(MAX1798A/MAX1799A) f = 10Hz to 100kHz, COUT = 4.7F
45
VRMS
2
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CDMA Cellular/PCS System Power Supplies
ELECTRICAL CHARACTERISTICS (continued)
(VIN1 = VIN2/3 = VIN4/5 = VSCLK (SCK) = VDIN (SDA) = V CS (AS) = V OFF = 3.6V; ON = GND = PGND = 0; RSO, ONO, DR1, DR2 = open; BP bypassed with 0.01F, OUT1 bypassed with 4.7F; OUT2, OUT3, OUT4, OUT5 bypassed with 2.2F; OUT1-5 set to 2.98V, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER OUT2-5 REGULATORS Output Accuracy Output Accuracy (Line and Load) Nominal Voltage Adjust Range Dropout Voltage Load Regulation Line Regulation Current Limit Output-Discharge Switch Resistance Output Voltage Noise Reset Timer Watchdog Timer OUT1 Shutdown Timer (MAX1798A/MAX1799A only) Regulator output turned off f = 10Hz to 100kHz, COUT = 2.2F 140 35 175 IOUT_ = 50mA (Note 3) 1mA IOUT_ 150mA, 2.5V VIN_ 5.5V, VOUT_ = 1.8V (Note 3) 32 steps through serial interface; Tables 2, 3 IOUT_ = 1mA (Notes 1, 3) IOUT_ = 100mA (Notes 1, 3) 1mA IOUT_ 150mA 2.5V VIN_ 5.5V, VOUT_ = 1.8V (Note 3) -0.15 160 -2 -3 1.8 1 50 -0.005 -0.02 250 110 45 235 60 295 430 110 540 0.11 500 300 100 2 3 3.3 % % V mV %/mA %/V mA VRMS ms ms SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX1798/MAX1798A/MAX1799/MAX1799A
LOGIC AND CONTROL INPUTS (ON, OFF, RSO, DIN (SDA), SCLK (SCK), CS (AS))
ms
Input Low Level
Input High Level SDA Output Low Level (MAX1799 only) OFF Pulldown Resistance ONO Output Low Level ONO Output High Level RSO Output Low Level RSO Output High Level (Internal Pullup Resistor) RSO Reset Resistance DR1, DR2 Output Low Level DR1, DR2 OFF Current (Leakage) THERMAL SHUTDOWN Threshold Hysteresis
VIL
VIH IDIN (SDA) = 3mA IDIN (SDA) = 6mA OFF = 5.5V IONO = 1mA IONO = -1mA IRSO = 1mA, VIN1 = 1V IRSO = 0 RSO = 2.48V IDR1 = IDR2 = 100mA (Note 3) IOFF VDR1 = VDR2 = 5.5V -1 VOUT1 0.5 9 14 0.2 VOUT1 0.5 80 155 0.05 1.6
0.4
0.4 0.6 360 0.5
V
V V
k V V
0.5
V V
19 0.5 1
k V A
160 10
C C
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3
CDMA Cellular/PCS System Power Supplies MAX1798/MAX1798A/MAX1799/MAX1799A
ELECTRICAL CHARACTERISTICS (continued)
(VIN1 = VIN2/3 = VIN4/5 = VSCLK (SCK) = VDIN (SDA) = V CS (AS) = V OFF = 3.6V; ON = GND = PGND = 0; RSO, ONO, DR1, DR2 = open; BP bypassed with 0.01F, OUT1 bypassed with 4.7F; OUT2, OUT3, OUT4, OUT5 bypassed with 2.2F; OUT1-5 set to 2.98V, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER Clock Frequency Bus-Free Time Between START and STOP Hold Time Repeated START Condition SCK Low Period SCK High Period Setup Time Repeated START Condition Data Hold Time Data Setup Time Maximum Pulse Width of Spikes that Must Be Suppressed by the Input Filter of Both SDA and SCK Signals Setup Time for STOP Condition SCLK Clock Frequency SCLK Low Period SCLK High Period Data Hold Time Data Setup Time CS Assertion to SCLK Rising Edge Setup Time CS Deassertion to SCLK Rising Edge Setup Time SCLK Rising Edge to CS Deassertion SCLK Rising Edge to CS Assertion CS High Period SPI TIMING (MAX1798/MAX1798A) fSCLK tcl tch tHD_DAT tSU_DAT tCSS tCS1 tCSH tCSO tCSW 125 125 0 125 200 200 200 200 300 2 MHz ns ns ns ns ns ns ns ns ns SYMBOL
SCK
CONDITIONS
MIN
TYP
MAX 400
UNITS kHz s s s s s s ns
I2C (SMB) TIMING (MAX1799/MAX1799A)
tBUF tHD_STA tLOW tHIGH tSU_STA tHD_DAT tSU_DAT tSP tSU_STO
1.3 0.6 1.3 0.6 0.6 0 100
50
ns
0.6
s
4
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CDMA Cellular/PCS System Power Supplies
ELECTRICAL CHARACTERISTICS
(VIN1 = VIN2/3 = VIN4/5 = VSCLK (SCK) = VDIN (SDA) = V CS (AS) = V OFF = 3.6V; ON = GND = PGND = 0; RSO, ONO, DR1, DR2 = open; BP bypassed with 0.01F, OUT1 bypassed with 4.7F; OUT2, OUT3, OUT4, OUT5 bypassed with 2.2F; OUT1-5 set to 2.98V, TA = -40C to +85C, unless otherwise noted.) (Note 2) PARAMETER IN1, IN2/3, IN4/5 Operating Voltage Undervoltage Lockout IN1 Undervoltage Lockout IN2/3 Undervoltage Lockout IN4/5 Power-On Reset Threshold Supply Current in Shutdown Supply Current (Standby) Supply Current (All Outputs On) BP Voltage OUT1 REGULATOR Output Accuracy Output Accuracy (Line and Load) Nominal-Voltage Adjust Range Dropout Voltage Line Regulation Current Limit Output-Discharge Switch Resistance in Shutdown OUT1 Reset Threshold Regulator output turned off OUT1 rising and falling IOUT_ = 50mA (Note 3) 1mA IOUT_ 150mA, 2.5V VIN_ 5.5V, VOUT_ = 1.8V (Note 3) 32 steps through serial interface; Tables 2, 3 IOUT_ = 100mA (Notes 1, 3) 2.5V VIN_ 5.5V, VOUT_ = 1.8V (Note 3) -0.15 160 Regulator output turned off MAX1798/MAX1799 MAX1798A/MAX1799A -9.5 -15 -2.5 -3.5 1.8 ISHDN ION VUVLO-1 VUVLO-2/3 VUVLO-4/5 SYMBOL (Note 1) IN1 rising edge IN2/3 rising edge IN4/5 rising edge IN1 falling edge OFF = 0, ON = IN1 OUT1 ON, other regulators OFF IOUT1 = 0 All regulators ON, IOUT_ = 0 IBP 1nA IOUT1 = 70mA (Note 3) 1mA IOUT1 300mA, 2.5V VIN1 5.5V, VOUT1 = 1.8V (Note 3) 32 steps through serial interface; Tables 2, 3 IOUT1 = 200mA (Notes 1, 3) 2.5V VIN1 5.5V, VOUT1 = 1.8V (Note 3) -0.15 320 1.225 -2.5 -3.5 1.8 CONDITIONS MIN 2.5 2.10 2.10 2.10 0.9 TYP MAX 5.5 2.45 2.45 2.45 2.1 10 230 680 1.275 2.5 3.5 3.3 125 0.11 850 300 -5.5 -11 2.5 3.5 3.3 100 0.11 500 300 UNITS V V V V V A A A V % % V mV %/V mA %
MAX1798/MAX1798A/MAX1799/MAX1799A
OUT2-5 REGULATORS Output Accuracy
Output Accuracy (Line and Load) Nominal-Voltage Adjust Range Dropout Voltage Line Regulation Current Limit Output-Discharge Switch Resistance in Shutdown
% % V mV %/V mA
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5
CDMA Cellular/PCS System Power Supplies MAX1798/MAX1798A/MAX1799/MAX1799A
ELECTRICAL CHARACTERISTICS (continued)
(VIN1 = VIN2/3 = VIN4/5 = VSCLK (SCK) = VDIN (SDA) = V CS (AS) = V OFF = 3.6V; ON = GND = PGND = 0; RSO, ONO, DR1, DR2 = open; BP bypassed with 0.01F, OUT1 bypassed with 4.7F; OUT2, OUT3, OUT4, OUT5 bypassed with 2.2F; OUT1-5 set to 2.98V, TA = -40C to +85C, unless otherwise noted.) (Note 2) PARAMETER Reset Timer Watchdog Timer
OUT1 Shutdown Timer (MAX1798A/MAX1799A only)
SYMBOL
CONDITIONS
MIN 140 35 175
TYP
MAX 430 110 540 0.4
UNITS ms ms ms V V V A k V V
LOGIC AND CONTROL INPUTS (ON, OFF, RSO DIN (SDA), SCLK (SCK), CS (AS))
Input Low Level Input High Level SDA Output Low Level (MAX1799 only) Logic Input Current OFF Pulldown Resistance ONO Output Low Level ONO Output High Level RSO Output Low Level RSO Output High Level (Internal Pullup Resistor) RSO Reset Resistance DR1, DR2 Output Low Level DR1, DR2 OFF Current (Leakage) Clock Frequency Bus-Free Time Between START and STOP Hold Time Repeated START Condition SCK Low Period SCK High Period Setup Time Repeated START Condition Data Hold Time Data Setup Time Setup Time for STOP Condition
VIL VIH IDIN (SDA) = 3mA IDIN (SDA) = 6mA 0 VIN VIN1; ON, DIN (SDA), SCLK (SCK), and CS (AS) only OFF = 5.5V IONO = 1mA IONO = -1mA IRSO = 1mA, VIN1 = 1V IRSO = 0 RSO = 2.48V IDR1 = IDR2 = 100mA (Note 3) IOFF VDR1 = VDR2 = 5.5V
1.6 0.4 0.6 -1 80 VOUT1 0.5 0.5 VOUT1 0.5 9 19 0.5 -1 1 1 360 0.5
V V k V A
I2C (SMB) TIMING (MAX1799/MAX1799A)
SCK
400 1.3 0.6 1.3 0.6 0.6 0 100 0.6 89
kHz s s s s s s ns s
tBUF tHD_STA tLOW tHIGH tSU_STA tHD_DAT tSU_DAT tSU_STO
6
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CDMA Cellular/PCS System Power Supplies
ELECTRICAL CHARACTERISTICS (continued)
(VIN1 = VIN2/3 = VIN4/5 = VSCLK (SCK) = VDIN (SDA) = V CS (AS) = V OFF = 3.6V; ON = GND = PGND = 0; RSO, ONO, DR1, DR2 = open; BP bypassed with 0.01F, OUT1 bypassed with 4.7F; OUT2, OUT3, OUT4, OUT5 bypassed with 2.2F; OUT1-5 set to 2.98V, TA = -40C to +85C, unless otherwise noted.) (Note 2) PARAMETER SCLK Clock Frequency SCLK Low Period SCLK High Period Data Hold Time Data Setup Time CS Assertion to SCLK Rising Edge Setup Time CS Deassertion to SCLK Rising Edge Setup Time SCLK Rising Edge to CS Deassertion SCLK Rising Edge to CS Assertion CS High Period SYMBOL fSCLK tcl tch tHD_DAT tSU_DAT tCSS tCS1 tCSH tCSO tCSW 125 125 0 125 200 200 200 200 300 CONDITIONS MIN TYP MAX 2 UNITS MHz ns ns ns ns ns ns ns ns ns SPI TIMING (MAX1798/MAX1798A)
MAX1798/MAX1798A/MAX1799/MAX1799A
Note 1: The dropout voltage is defined as (VIN - VOUT) when VOUT is 100mV below the value of VOUT for VIN = VOUT + 1V. Note 2: Specifications to -40C are guaranteed by design, not production tested. Note 3: Specifications are guaranteed by design, not production tested in the EGP (QFN) package.
Typical Operating Characteristics
(TA = +25C, unless otherwise noted.)
OUTPUT VOLTAGE ACCURACY (OUT1) vs. LOAD CURRENT
MAX1798/99-01
OUTPUT VOLTAGE ACCURACY (OUT2-5) vs. LOAD CURRENT
MAX1798/99-02
OUTPUT VOLTAGE ACCURACY (OUT1) vs. TEMPERATURE
1.5 1.0 ACCURACY (%) ILOAD = 70mA VOUT1(NOM) = 2.98V
MAX1798/99-03
2.0 1.5 1.0 ACCURACY (%)
2.0 1.5 1.0 ACCURACY (%)
2.0
0.5 0 -0.5 -1.0 -1.5 -2.0 0 50 100
VOUT1 = 3.3V
0.5 0 -0.5 -1.0 -1.5 -2.0
VOUT1 = 3.3V
0.5 0 -0.5 -1.0 -1.5 -2.0
VOUT1 = 1.8V
VOUT1 = 2.98V
VOUT1 = 2.98V VOUT1 = 1.8V
150
200
250
300
0
25
50
75
100
125
150
-40
-15
10
35
60
85
LOAD CURRENT (mA)
LOAD CURRENT (mA)
TEMPERATURE (C)
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7
CDMA Cellular/PCS System Power Supplies MAX1798/MAX1798A/MAX1799/MAX1799A
Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
GROUND-PIN CURRENT (OUT1) vs. LOAD CURRENT
MAX1798/99-04
GROUND-PIN CURRENT (OUT1) vs. SUPPLY VOLTAGE (VIN1)
MAX1798/99-05
GROUND-PIN CURRENT (OUT1) vs. TEMPERATURE
VIN = 3.6V ILOAD = 200mA
MAX1798/99-06
200 190 GROUND-PIN CURRENT (A) 180 170 160 150 140 130 120 110 100 0 50 100 150 200 250 VOUT1 = 2.98V VOUT1 = 1.8V VIN1 = 3.6V OUT2-5 OFF VOUT1 = 3.3V
400 350 GROUND-PIN CURRENT (A) 300 250 200 150 100 50 0
VOUT1 = 2.98V
200 190 180 170 160 150 140
ILOAD = 200mA
ILOAD = 0
GROUND-PIN CURRENT (A)
300
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
-40
-15
10
35
60
85
LOAD CURRENT (mA)
SUPPLY VOLTAGE (V)
TEMPERATURE (C)
DROPOUT VOLTAGE (OUT1) vs. LOAD CURRENT
MAX1798/99-07
DROPOUT VOLTAGE (OUT2-5) vs. LOAD CURRENT
MAX1798/99-08
POWER-SUPPLY REJECTION RATIO vs. FREQUENCY
80 70 60 PSRR (dB) COUT2-5 = 2.2F
MAX1798/99-09
150 125 DROPOUT VOLTAGE (mV) TA = +85C 100 75 50 25 0 0 50 100 150 200 250 TA = +25C TA = -40C
150 125 DROPOUT VOLTAGE (mV) 100 75 50 TA = +25C 25 0 TA = -40C
90
TA = +85C
50 40 30 20 10 0
COUT1 = 4.7F
VOUT_ = 2.98V ILOAD = 10mA CBP = 0.01F 0.01 0.1 1 10 100 1000
300
0
25
50
75
100
125
150
LOAD CURRENT (mA)
LOAD CURRENT (mA)
FREQUENCY (kHz)
OUTPUT NOISE vs. LOAD CURRENT
OUT1 = 2.98V COUT1 = 4.7F
MAX1798/99-10
OUTPUT NOISE
MAX1798/99-11
CHANNEL-TO-CHANNEL ISOLATION vs. FREQUENCY
CHANNEL-TO-CHANNEL ISOLATION (dB)
MAX1798/99-12
60 50 OUTPUT NOISE (VRMS) 40 30 20 10 0 1
70 60 50 40 30 20 10 0 OUT2/3 = 2.98V COUT2/3 = 2.2F ILOAD = 100mA CBP = 0.01F 0.1 1 10 FREQUENCY (kHz) 100
OUT2-5 = 2.98V COUT2-5 = 2.2F
f = 10Hz TO 100kHz CBP = 0.01F 10 100 1000
f = 10Hz TO 100kHz COUT2 = 2.2F, ILOAD = 10mA CBP = 0.01F 100s/div VOUT, 50V/div
1000
LOAD CURRENT (mA)
8
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CDMA Cellular/PCS System Power Supplies MAX1798/MAX1798A/MAX1799/MAX1799A
Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
LINE-TRANSIENT RESPONSE
MAX1798/99-13
LOAD-TRANSIENT RESPONSE
MAX1798/99-14
LOAD-TRANSIENT RESPONSE (NEAR DROPOUT)
MAX1798/99-15
VOUT1 AC-COUPLED 50mV/div
VOUT AC-COUPLED 10mV/div
VIN = 3.7V TO 4.0V, VOUT = 2.98V ILOAD = 100mA 20s/div
ILOAD 100mA/div
VIN1 = 3.5V, VOUT1 = 2.98V ILOAD = 20mA TO 200mA, OUT2/3/4/5 = OFF 2s/div
VIN1 = 3.1V, VOUT1 = 2.98V ILOAD = 20mA TO 200mA, OUT2/3/4/5 = OFF 2s/div
ENTERING SHUTDOWN
MAX1798/99-16
STARTUP
MAX1798/99-17
OFF 2V/div
ON 2V/div
VOUT1 1V/div
VOUT 2V/div
RSO 2V/div ILOAD = 0 10ms/div 40ms/div
TSSOP SAFE OPERATING AREA (POWER DISSIPATION LIMIT)
MAX1798/99-18
QFN SAFE OPERATING AREA (POWER DISSIPATION LIMIT)
900 800 700 600 500 400 300 200 TA = +25C TA = +85C 2.5 3.0 3.5 4.0 4.5 5.0 INPUT VOLTAGE (V) VOUT = 1.8V VOUT = 2.98V MAX RECOMMENDED OUTPUT CURRENT MAX RECOMMENDED INPUT VOLTAGE
MAX1798/99-19
1000 MAXIMUM OUTPUT CURRENT (mA) 900 800 700 600 500 400 300 200 2.5 TA = +25C TA = +85C 3.0 3.5 4.0 4.5 5.0 INPUT VOLTAGE (V) VOUT = 1.8V VOUT = 2.98V MAX TOTAL OUTPUT CURRENT MAX RECOMMENDED INPUT VOLTAGE
1000 MAXIMUM OUTPUT CURRENT (mA)
5.5
6.0
5.5
6.0
_______________________________________________________________________________________
ILOAD 100mA/div
VOUT1 AC-COUPLED 50mV/div
VIN 500mV/div
9
CDMA Cellular/PCS System Power Supplies MAX1798/MAX1798A/MAX1799/MAX1799A
Pin Description
PIN NAME TSSOP 1 2 3 4 5 6 7 QFN 19 20 1 2 3 4 5 CS (AS) SCLK (SCK) DIN (SDA) ONO GND BP PGND Chip-Select Input for SPI (MAX1798/MAX1798A). Address Select Input for I2C (MAX1799/MAX1799A). Clock Input for Serial Interface. Data is read on the rising edge of the clock. SCLK for MAX1798/MAX1798A. SCK for MAX1799/MAX1799A. Data Input for Serial Interface. Data is read on the rising edge of the clock. DIN for MAX1798/MAX1798A. SDA for MAX1799/MAX1799A. ON Output. Indicates the state of ON. After initial power-up, the logic level of this pin follows that of ON. Used to signal the microcontroller (C) for an OFF request (allows push-on/push-off). Ground 1.25V Reference Bypass. Connect a 0.01F bypass capacitor to GND for reduced noise. Do not load this pin. Power Ground Reset Output. Holds the C system reset line low during initial startup and whenever OUT1 falls out of regulation. RSO has a 140ms (min) timeout period and is an open-drain output with an internal 14k pullup to OUT1. The RSO line maintains a valid low output level for IN1 as low as 1V. 2 Open-Drain Driver Output 1. Maximum sink current is 150mA (100mARMS). Can drive up to 10 LEDs for backlight or a vibrator motor. 2 Open-Drain Driver Output 2. Maximum sink current is 150mA (100mARMS). Can drive up to 10 LEDs for backlight or a vibrator motor. OFF Input. A low level to this pin when ON is high turns off the IC once the watchdog timer has timed out. A high-level input keeps the chip on. There is an internal 155k pulldown resistor at this input. Output 5, Output of Linear Regulator 5; 150mA (max) Output Current. Connect a 2.2F ceramic bypass capacitor to PGND. Supply Inputs 4 and 5. Voltage supply for linear regulators 4 and 5. Output 4, Output of Linear Regulator 4; 150mA (max) Output Current. Connect a 2.2F ceramic bypass capacitor to PGND. Output 1, Output of Linear Regulator 1; 300mA (max) Output Current. Connect a 4.7F ceramic bypass capacitor to PGND. Supply Input 1. Voltage supply for linear regulator 1 and serial interface. Output 3, Output of Linear Regulator 3; 150mA (max) Output Current. Connect a 2.2F ceramic bypass capacitor to PGND. Supply Inputs 2 and 3. Voltage supply for linear regulators 2 and 3. Output 2, Output of Linear Regulator 2; 150mA (max) Output Current. Connect a 2.2F ceramic bypass capacitor to PGND. ON Input. An active-low turns on the device, enabling LDO1, RESET, the ON/OFF logic, and the serial interface. FUNCTION
8
6
RSO
9 10
7 8
DR1 DR2
11
9
OFF
12 13 14 15 16 17 18 19 20
10 11 12 13 14 15 16 17 18
OUT5 IN4/5 OUT4 OUT1 IN1 OUT3 IN2/3 OUT2 ON
10
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CDMA Cellular/PCS System Power Supplies MAX1798/MAX1798A/MAX1799/MAX1799A
Table 1. Control Data Byte
COMMAND FUNCTION C2 Update DAC Outputs OUT1 DAC OUT2 DAC OUT3 DAC OUT4 DAC OUT5 DAC Driver Outputs ON/OFF Conrol 0 0 0 0 1 1 1 1 C1 0 0 1 1 0 0 1 1 C0 0 1 0 1 0 1 0 1 X ON5 X ON4 U4 D4 U5 DAC1 (Table 2) DAC1 (Table 2) U3 DAC1 (Table 2) DAC1 (Table 2) DAC1 (Table 2) X ON3 DR2 ON2 DR1 ON1 D3 D2 D1 U2 D0 U1 DIN (SDA)
Note: C2 is MSB, and D0 is LSB. X = Don't care.
Detailed Description
The MAX1798/MAX1798A/MAX1799/MAX1799A drive CDMA cellular and PCS handsets or systems with inputs from 2.5V to 5.5V. The devices contain five LDOs, two open-drain outputs, and a reset output as shown in Figure 1. All outputs are individually programmable through either an SPI (MAX1798/MAX1798A) or I2C (MAX1799/MAX1799A) serial-port interface. The outputs may be turned on or off individually through the serial interface. Their output voltages are adjustable from 1.8V to 3.3V in 32 increments. At power-up, all outputs are at a default value of 2.98V, but only OUT1 is on. OUT1 is rated for 300mA and optimized for low dropout. OUT2-5 are rated for 150mA. All LDOs are optimized for low noise, high isolation, and low dropout.
OUT2-5 are set to 2.98V, but turned off. The control data byte must be used to turn them on. If VIN1 falls below 1V, a POR circuit resets all LDO voltages to 2.98V and OUT2-5 are turned off. If VIN2/3 or VIN4/5 fall below 2.15V, the UVLO circuit turns off the corresponding output, but all LDO voltages remain at their prior settings. OUT2-5 are optimized for low noise and high isolation.
Open-Drain Outputs
The open-drain N-channel MOSFETs (DR1 and DR2, Figure 2) have a nominal 2 on-resistance and can be used to drive up to 10 LEDs for backlight or a vibrator motor. DR1 and DR2 can sink 100mARMS (max). At power-up, DR1 and DR2 are high impedance and are commanded on by the control data byte.
Linear Regulator 1
Regulator 1 is a low-dropout linear regulator that sources 300mA (max), operating from a 2.5V to 5.5V input voltage (VIN1). OUT1 is turned on by using the on button. OUT1 is turned off by using either the off pin or the serial port. Its output can be adjusted from 1.8V to 3.3V from the SPI or I2C serial-port interface by setting the control data byte (Table 1). OUT1 is always on when the MAX1798/MAX1798A/MAX1799/MAX1799A are on. If OUT1 is turned off, the entire IC shuts down. If VIN1 falls below 1V, a POR circuit resets all LDO voltages to 2.98V and OUT1 is left on while OUT2-5 are turned off.
RSO
RSO is an open-drain output, connected to OUT1 through an internal 14k resistor. At power-up, OUT1 turns on and RSO is held low for 140ms (min). When RSO goes high, OFF must be brought high within 35ms to keep OUT1 on. Otherwise, if OFF is low, the watchdog timer circuit counts down 35ms (min), and RSO is actively held low while the entire device turns off. The MAX1798/MAX1799 RSO goes low when OUT1 droops by more than 7.5% 2% of its programmed output voltage. The MAX1798A/MAX1799A RSO goes low when OUT1 droops by more than 13% 2% of its programmed output voltage. RSO stays low for 140ms (min) after OUT1 rises above the threshold. During this time, the watchdog timer circuit is inactive. The MAX1798A/MAX1799A have an additional timer circuit to shut down the regulators when the RSO and watchdog timer time out. If the OUT1 voltage level ever exceeds the RSO threshold level before the reset and
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Linear Regulators 2-5
Regulators 2-5 are LDOs that source 150mA (max) from input voltages (VIN2/3 and VIN4/5) of 2.5V to 5.5V. OUT2-5 can be turned on or off and adjusted from 1.8V to 3.3V through the SPI or I2C serial-port interface by setting the control data byte (Table 1). At power-up,
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CDMA Cellular/PCS System Power Supplies MAX1798/MAX1798A/MAX1799/MAX1799A
ONO ON ON/OFF LOGIC OFF ON THERMAL SHUTDOWN OUT1 1.8V TO 3.3V 300mA VCC 4.7F 14k OFF 155k MSM CONTROLLER TX RX VBATT DR1 2 CS (AS)* SERIAL PORT SPI OR I 2C SCLK (SCK)* DIN (SDA)* CONTROL REGISTERS (ON/OFF AND VOUT PROGRAMMING) 2 VIBRATOR MOTOR ON DETECT IRQ WDOUT
100k
IN1
LDO1 (LOW NOISE, 0.3) 5-BIT DAC
RESET (140ms)
RSO
ACTIVE-LOW RESET
THERMAL SHUTDOWN LDO2 (LOW NOISE, 0.5) 5-BIT DAC 10F IN2/3 THERMAL SHUTDOWN LDO3 (LOW NOISE, 0.5) 5-BIT DAC THERMAL SHUTDOWN LDO4 (LOW NOISE, 0.5) 5-BIT DAC IN4/5 THERMAL SHUTDOWN VBATT 2.5V TO 5.5V LDO5 (LOW NOISE, 0.5) 5-BIT DAC OUT5 1.8V TO 3.3V 150mA 2.2F AUDIO OR PLL + VCO OUT4 1.8V TO 3.3V 150mA 2.2F OUT3 1.8V TO 3.3V 150mA 2.2F OUT2 1.8V TO 3.3V 150mA 2.2F
BBA + TCXO
DR2
BP 0.01F
MAX1798/MAX1798A MAX1799/MAX1799A GND
PGND
( ) *ARE FOR MAX1799.
Figure 1. Typical Application Circuit/Functional Diagram 12 ______________________________________________________________________________________
CDMA Cellular/PCS System Power Supplies MAX1798/MAX1798A/MAX1799/MAX1799A
A B C D E F G H I J K L M
tLOW
tHIGH
SCL
SDA
tSU:STA tHD:STA A = START CONDITION B = MSB OF ADDRESS CLOCKED INTO SLAVE C = LSB OF ADDRESS CLOCKED INTO SLAVE D = R/W BIT CLOCKED INTO SLAVE E = SLAVE PULLS SMBDATA LINE LOW
tSU:DAT
tHD:DAT F = ACKNOWLEDGE BIT CLOCKED INTO MASTER G = MSB OF DATA CLOCKED INTO SLAVE (OP/SUS BIT) H = LSB OF DATA CLOCKED INTO SLAVE I = SLAVE PULLS SMBDATA LINE LOW
tSU:STO tBUF J = ACKNOWLEDGE CLOCKED INTO MASTER K = ACKNOWLEDGE CLOCK PULSE L = STOP CONDITION, DATA EXECUTED BY SLAVE M = NEW START CONDITION
Figure 2. I2C-Compatible Serial-Interface Timing Diagram
ON (INPUT)
OUT1 RSO (OUTPUT) OFF (INPUT) ONO (OUTPUT)
140ms min 10s min 35ms max
140ms min
35ms max
52ms typ
35ms max PULSED HIGH OR CONTINUOUS HIGH
Figure 3. Push-On/Push-Off Startup and Shutdown Timing Diagram
watchdog timers time out, the shutdown timer is reset. The shutdown timer requires continuous low RSO signal and continuous nontriggered watchdog timer to shut down the regulators.
ON and OFF Logic
See Figure 3. The MAX1798/MAX1798A/MAX1799/ MAX1799A power up when VIN1 is greater than 2.5V and ON is low (ON button is pressed down momentarily). When ON returns high, the device remains on. It turns on OUT1 and the serial interface port. Once OUT1 is in regulation, RSO stays low an additional
140ms (min). At this time, OUT1 is on and set to 2.98V, while OUT2-5 are disabled and set to 2.98V. To stay on, the OFF pin must be in a high state within 35ms (min) or the device will shut down and can only be turned on by pressing the ON button. While ON is held low, the status of OFF is irrelevant and OUT1 and the serial port are on. After initial power-up, the logic level of ONO follows the logic level of ON but is level-shifted to OUT1 high voltage. This signal can be used to interrupt the system controller, which can subsequently manage an orderly shutdown through the serial port by turning off OUT1.
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CDMA Cellular/PCS System Power Supplies MAX1798/MAX1798A/MAX1799/MAX1799A
Hard Shutdown To shut down the MAX1798/MAX1798A/MAX1799/ MAX1799A, drive OFF low or allow the internal resistor to pull down OFF while ON is high. The device shuts down after the watchdog timer has cleared (35ms min, 52ms typ). During shutdown, all LDO outputs and RSO are actively pulled to GND, the open-drain drivers are in a high-impedance state, and the serial port and reset timer are inactive. Previously programmed output voltage data is retained in the internal registers as long as VIN1 > 2.1V. If the device is turned back on by the ON button, OUT1 automatically is enabled with the preshutdown output voltage. OUT2-5 automatically return to their preshutdown voltages once they are enabled through the serial interface. Soft Shutdown The serial port can also be used to shut down the MAX1798/MAX1798A/MAX1799/MAX1799A. Using the control data byte to disable OUT1 will shut down the entire device. Once shut down, the only means to turn on the device is through a momentary low on the ON button. CS along with SCLK and DIN to communicate. The serial port operates when the device is enabled, even when RSO is low. The MAX1798/MAX1798A can support a 2MHz (max) data rate. This SPI-compatible port uses the CPOL = CPHA = 0 protocol.
I2C-Compatible Serial Interface
Use an I2C-compatible 2-wire serial interface with the MAX1799/MAX1799A to control the ON/OFF state and output voltage of each regulator, the ON/OFF state of the drivers, and to shut down the device. Use standard I2C-compatible write-byte commands to program the IC. Figure 2 is a timing diagram for the I2C protocol. The MAX1799/MAX1799A is always a slave to the bus master. The serial port operates when the device is enabled, even when OUT1 and RSO are low. When AS is high, the address is 0111111. When AS is low, the address is 1001111. Two MAX1799/MAX1799A devices can be controlled by a single bus master.
Output Voltage
The MAX1798/MAX1798A/MAX1799/MAX1799A are supplied with factory-set output voltages. At power-up, all DACS are set for 2.98V, while only OUT1 is enabled; all other LDO outputs and drivers are off. OUT2-5, DR1, and DR2 must be enabled on with the serial port. OUT2-5 can be individually programmed through the serial port from 1.8V to 3.3V in 32 steps, either while on or off. OUT1 can be programmed in 32 steps from 1.8V to 3.3V only while on. (If OUT1 is off, the serial port is also off, and OUT1 cannot be programmed.) If OUT1 is turned off through the serial port or the OFF pin, the entire chip, including the serial port, will be shut down. However, all previously programmed DAC settings will be retained as long as a valid supply voltage is maintained on IN1 (VIN1 > 2.1V).
Control Data Byte
The control data byte is 8 bits long (3 command bits and 5 data bits). The first 3 bits specify the action to be taken, while the last 5 bits set the output voltage or ON/OFF status. Each regulator has an individual DAC that sets the output voltage. The DAC registers are double buffered to allow for simultaneous updating of all outputs. The output voltage is programmed per Table 2 or Table 3. At power-up, if no specific voltage is programmed, OUT1-5 will be set for 2.98V. All DAC programming must be shifted from the double buffer to the DACs with the update DAC command (Table 1, 000XXXXX) for the programmed voltages to be seen at the LDO outputs. The DACs can be updated one at a time or all at once after all desired outputs are programmed. The ON/OFF status of the LDOs and drivers is not double-buffered and takes immediate effect upon CS returning high (SPI compatible) or upon the ninth rising edge of SCK during the command byte (Figure 2, edge L). A one turns on the LDO output or driver output, and a zero turns it off.
Current Limit
The MAX1798/MAX1798A/MAX1799/MAX1799A include current limiting on each LDO output. OUT1 has a current limit set at 500mA (320mA min), while OUT2-5 have current limits set at 250mA (160mA min). When the LDO output is in current limit, the current-limiter device monitors and controls the pass transistor's gate voltage, limiting the output current available from the LDO. Once the excessive load is removed, normal function resumes automatically.
SPI-Compatible Serial Interface
Use an SPI-compatible 3-wire serial interface with the MAX1798/MAX1798A to control the ON/OFF state and output voltage of each regulator, the ON/OFF state of the drivers, and to shut down the device. Figures 4a and 4b are timing diagrams for the SPI protocol. The MAX1798/MAX1798A is a write-only device and uses
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CDMA Cellular/PCS System Power Supplies MAX1798/MAX1798A/MAX1799/MAX1799A
Table 2. OUT1-5 Output Voltages (Binary Format)
REGULATOR OUTPUT VOLTAGE (V)
Table 3. OUT1-5 Output Voltages (Hexadecimal Format)
REGULATOR OUTPUT VOLTAGE (V)
DAC_ DATA
DAC_ DATA
OUT1- OUT5 1.800 1.827 1.854 1.883 1.912 1.942 1.974 2.006 2.039 2.074 2.109 2.146 2.184 2.224 2.265 2.308 2.352 2.398 2.445 2.495 2.547 2.601 2.657 2.716 2.777 2.842 2.909 2.980 3.054 3.132 3.214 3.300
D4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
OUT1- OUT5 1.800 1.827 1.854 1.883 1.912 1.942 1.974 2.006 2.039 2.074 2.109 2.146 2.184 2.224 2.265 2.308 2.352 2.398 2.445 2.495 2.547 2.601 2.657 2.716 2.777 2.842 2.909 2.980 3.054 3.132 3.214 3.300
OUT5 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF
OUT4 80 81 82 83 84 85 86 87 88 89 8A 8B 8C 8D 8E 8F 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9E 9F
OUT3 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F
OUT2 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F
OUT1 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F
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CDMA Cellular/PCS System Power Supplies MAX1798/MAX1798A/MAX1799/MAX1799A
INSTRUCTION EXECUTED CS
1 SCLK DIN A2 A1 A0 D4 D3 D2 D1
8
DO
Figure 4a. Serial-Interface Timing Diagram
CS
tCSH0 tCSS0 tCH tCSH1
tCSW
SCLK
tDS tDH
tCL
tCSS1
DIN
Figure 4b. Detailed Serial-Interface Timing Diagram
Thermal-Overload Protection
The MAX1798/MAX1798A/MAX1799/MAX1799A integrate a separate thermal monitor for each linear regulator. When the junction temperature of any LDO exceeds TJ = +160C, the specific thermal sensor signals the shutdown logic, turning off the pass transistor and allowing that LDO to cool. The thermal sensor turns the pass transistor on again after the LDO's junction temperature cools by 10C, resulting in a pulsed output during continuous thermal-overload conditions. Due to the substrate's thermal conductivity, a thermal overload on one LDO may possibly affect other LDOs on the device.
Thermal-overload protection is designed to protect the MAX1798/MAX1798A/MAX1799/MAX1799A in the event of fault conditions. For continual operation, do not exceed the absolute maximum junction-temperature rating of TJ = +150C.
Noise Reduction
Bypass BP to GND with an external 0.01F bypass capacitor. The MAX1798/MAX1798A/MAX1799/ MAX1799A exhibit 45VRMS of output voltage noise. Graphs of Output Noise vs. Load Current, Output Noise (10Hz to 100kHz), PSRR vs. Frequency, and Channelto-Channel Isolation vs. Frequency appear in the Typical Operating Characteristics.
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CDMA Cellular/PCS System Power Supplies
Applications Information
Capacitor Selection and Regulator Stability
Use a 10F low-ESR ceramic capacitor on the MAX1798/MAX1798A/MAX1799/MAX1799A's input if all the supply inputs are connected together. Larger input capacitance and lower ESR provide better supply noise rejection and line-transient response. If IN1, IN2/3, and IN4/5 are connected to different supply voltages, bypass each input with a 4.7F low-ESR ceramic capacitor. A minimum 4.7F low-ESR ceramic capacitor is recommended on OUT1, and a minimum 2.2F low-ESR ceramic capacitor is recommended on OUT2-5. The MAX1798/MAX1798A/MAX1799/MAX1799A are stable with output capacitors in the ESR range of 10m to 1. Use larger capacitors to reduce noise and improve load-transient response, stability, and power-supply rejection. Note that some ceramic dielectrics exhibit large capacitance and ESR variation with temperature. With dielectrics such as Z5U and Y5V, it may be necessary to use a minimum 4.7F on OUT2-5 to ensure stability at temperatures below -10C. With X7R or X5R dielectrics, 2.2F should be sufficient at all operating temperatures. Tantalum capacitors may cause instability with the MAX1798/MAX1798A/MAX1799/MAX1799A and are not recommended for this application. Use a 0.01F bypass capacitor at BP for low outputvoltage noise. Increasing the capacitance will slightly decrease the output noise but will increase the startup time. Values above 0.1F provide no performance advantage and are not recommended. When operating from sources other than batteries, improved supply noise rejection and transient response can be achieved by increasing the values of the input and output bypass capacitors and through passive filtering techniques. The Typical Operating Characteristics show the MAX1798/MAX1798A/MAX1799/ MAX1799A line- and load-transient responses.
MAX1798/MAX1798A/MAX1799/MAX1799A
Load-Transient Considerations
The MAX1798/MAX1798A/MAX1799/MAX1799A loadtransient response graphs (see Typical Operating Characteristics) show three components of the output response: the output capacitor's ESR spike, the regulator's transient settling response, and the DC shift due to the LDO's load regulation. Increasing the output capacitor's value and decreasing the ESR reduce the overshoot.
Dropout Voltage
A regulator's minimum input-output voltage differential (dropout voltage) determines the lowest usable supply voltage. In battery-powered systems, this determines the useful end-of-life battery voltage. Because the MAX1798/MAX1798A/MAX1799/MAX1799A use Pchannel MOSFET pass transistors, their dropout voltage is a function of drain-to-source on-resistance (R DS(ON) ) multiplied by the load current. See the Dropout Voltage (OUT1) vs. Load Current graph in the Typical Operating Characteristics.
Ordering Information (continued)
PART MAX1799EGP MAX1799EUP MAX1799AEGP MAX1799AEUP TEMP RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C PINPACKAGE 20 QFN 20 TSSOP-EP 20 QFN 20 TSSOP-EP INTERFACE I2C I2C I2C I2C
Line-Transient Considerations
The MAX1798/MAX1798A/MAX1799/MAX1799A are designed to deliver low dropout voltages and low quiescent currents in battery-powered systems. Powersupply rejection is >60dB at low frequencies and rolls off above 10kHz. See the Power-Supply Rejection Ratio (PSRR) vs. Frequency graph in the Typical Operating Characteristics.
Chip Information
TRANSISTOR COUNT: 1735
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CDMA Cellular/PCS System Power Supplies MAX1798/MAX1798A/MAX1799/MAX1799A
Pin Configurations
TOP VIEW
CS (AS)
TOP VIEW
SCLK (SCK)
CS (AS) 1
20 ON 19 OUT2 18 IN2/3 17 OUT3
OUT2
IN2/3
ON
SCLK (SCK) 2 DIN (SDA) 3
20 DIN (SDA) ON0 1 2
19
18
17
16 15 14 OUT3 IN1
ONO 4 GND 5 BP 6 PGND 7 RSO 8
MAX1798 MAX1798A MAX1799 MAX1799A
16 IN1 15 OUT1 14 OUT4 13 IN4/5 12 OUT5 11 OFF
GND BP
3 4
MAX1798 MAX1798A MAX1799 MAX1799A
13 12
OUT1 OUT4
DR1 9 DR2 10
TSSOP
PGND 5 11 IN4/5
( ) ARE FOR MAX1799/MAX1799A ONLY.
6 RS0
7 DR1
8 DR2
9 OFF
10 OUT5
QFN 5mm 5mm 0.85mm
( ) ARE FOR MAX1799/MAX1799A ONLY.
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CDMA Cellular/PCS System Power Supplies
Package Information
TSSOP, 4.0,EXP PADS.EPS
MAX1798/MAX1798A/MAX1799/MAX1799A
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CDMA Cellular/PCS System Power Supplies MAX1798/MAX1798A/MAX1799/MAX1799A
Package Information (continued)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
20 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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